Halfway Through

The title represents the state of affairs vis-a-vis my examinations.

I took my S.E test today.

Come to think of it ... I think my examination schedule is pretty much based on the System Development Life Cycle (SDLC).

1. The Requirement Phase - This phase is usually encountered by me during the preparatories that we are allowed before the exams. It is during this period that I start to realise what I have to do in order to get those coveted, and on some occasions elusive - thankfully not for me though, 24 marks.
I ,essentially, draw the line and decide how much of effort I shall have to put in to scrape through.

2. The Analysis Phase - This phase helps me map out my actual schedule for each exam . By schedule I imply actually planning out which chapters are to be done by me , the time taken for each chapter etc etc.

3. The Design Phase - This phase encloses within it's realm the key to attain those "24". This stage involves the actual studying part. It's where I date my books.

4. The Implementation Phase - This phase represents the examination. This is where i actually put to use whatever I have assimilated thus far.

4/5 Transition Phase - Yes, I realise this phase odes not exist within SDLC but I thought it best to mention it. This is THE BONUS ROUND, as I like to call it. This represents the last 5 minutes of the examination. It is during this time that I find my paper almost complete and I proceed to answer the 2 mark questions that I had previously purposely overlooked due the doubt I had housed in my abilities to answer them succintly. Any marks obtained through these few questions are a bonus and , therefore, always welcome.

5. The Post Implementation Phase - This phase occurs when I step out of the hall. It represents the autopsy of the paper.

Ahh ... Life is an SDLC.

Hah.

I think, until the 6th , it's more of a real time operating system.

Adios
A.G